PhD position in Physical Design of Integrated Circuits (ICs)
Date: Oct, 2024
We are seeking a highly motivated PhD student for research in Physical Design of Integrated Circuits (ICs), focusing on nanometer-scale technologies. The project involves:
- Floorplanning, placement, routing, and clock tree synthesis.
- Power, performance, and area (PPA) optimization.
- Advanced techniques for managing delay, leakage, and parasitics.
- Use of leading EDA tools like Cadence Innovus for design, verification, and tapeout.
Preference will be given to candidates with industry experience in chip tapeouts.
Qualifications:
- Bachelor degree in Computer/Electrical Engineering or related fields.
- Experience with physical design tools (e.g., Innovus, Synopsys ICC).
- Proficiency in Tcl, Python, Verilog, or VHDL.
- Industry experience in chip tapeouts is preferred.
How to Apply:
Submit your CV, transcripts, and references to:
Prof. Yang (Cindy) Yi.
