Encoders and ASIC Design

Like biological neural systems, signals can be transmitted as spikes in neuromorphic neural networks. Thus, a spike encoder is essential for a neuromorphic computing system. To better understand the functionality of a neuromorphic network, neural encoding schemes need to be carefully investigated. Such an encoding scheme refers to converting the information of input stimuli into a set of spike trains, which the downstream units can process.

The research about encoding schemes started a few decades ago. There are two main kinds of encoding schemes, Rate Encoding and Temporal Encoding. Rate encoding is an encoding scheme that maps the input information to the number of spikes within the sampling window. Rate encoding is easier to understand and implement than other encoding schemes. Thus, it is more widely realized in software and hardware implementations than other encoding schemes. Unfortunately, this encoding scheme has the disadvantage of low data density. Since rate encoding only uses the number of spikes to convey information, the temporal patterns of spikes in encoding windows are ignored. On the other hand, temporal codes tend to transmit information with the temporal patterns of spikes, thus utilizing both the number of spikes and the firing time of the spikes. Two different types of temporal encoding are commonly investigated, the Time-to-First-Spike (TTFS) encoding and the Interspike-Interval (ISI) encoding.

With the progress of large-scale data processing applications, the demand for higher data processing capacity becomes increasingly intense. Researchers have found an encoding scheme that combines multiple schemes to increase the data capacity in biological neural systems, called the Multiplexing Encoding scheme. Besides better encoding capability, multiplexing encoding has some other advantages as well. This scheme is more stable and robust with an internal reference frame, than other encoding schemes, especially in the noisy environments. Our group has designed and analyzed the first Application-Specific Integrated Circuit (ASIC) chip of the ISI temporal encoder and the multiplexing temporal encoder (to the best of our knowledge). These encoder designs have achieved both - a high training/inference accuracy and extremely high power efficiency with reasonable design area.

Currently involved students

• Honghao Zhengh